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IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 3, AUGUST 2007
393
Measurement of Moisture-Induced Packaging Stress
With Piezoresistive Sensors
Ben-Je Lwo and Chih-Shiang Lin
Abstract—
Moisture is one of the major contributing factors in
fracture and reliability issues for microelectronic packaging. To
characterize the moisture-induced stress distribution inside the
packaging structure, an
in situ
, quantitative, and nondestructive
experimental methodology is needed. This paper proposes the use
of piezoresistive sensors to measure moisture-induced stress in a
plastic low profile, fine pitch, ball grid array (LFBGA) packaging.
The measurements include hygroscopic swelling stress extractions
and real-time stress monitoring of the popcorn phenomenon, and
the results associated with gravimetric analyses are reported.
Postreflow scanning acoustic microscope (SAM) inspection results
and cross section observations are used as experimental verifi-
cation. Comparing with thermal stresses previously measured
on the same package, it is found that the hygroscopic mismatch
stress is significant and important for package engineers. In
addition, piezoresistive sensors were proven useful in this work
for recording popcorn occurrence and monitoring the stress drops
at the popcorn initiation.
Index Terms—
Electronic packaging, hygroscopic mismatch,
moisture-induced effect, piezoresistive sensor, popcorn failure.
compounds with a TMA. Stellrecht
et al.
[4] measured CHS
using Moire interferometry. Compared with typical packaging
thermal strains, studies [1], [2], [4] have shown that polymer
materials exhibited a considerable amount of hygroscopic
strain. However, neither direct hygroscopically-induced silicon
die stress measurements nor comparisons between thermally
and hygroscopically-induced stress have been documented for
typical plastic packaging.
Due to the vapor pressure of the moisture absorbed inside a
nonhermetic microelectronic package and the thermal expan-
sion mismatch associated with different packaging materials,
delaminations can occur within a package. This is much more
likely to occur with the rapid thermal excursion during a solder
reflow process. The aforementioned failure is termed the “pop-
corn effect” due to the audible “popping” sounds associated with
the package cracking and the similarity to the process of cooking
edible popcorn. Six JEDEC moisture sensitivity levels (MSLs)
[6] have been classified for handling, bagging and assembly, and
criteria exist to avoid moisture-induced failures.
Many modeling approaches have been proposed to char-
acterize the popcorn effect in the literature. Lau and Lee [7]
and Tay
et al.
[8] modeled the popcorn effect using a combi-
nation of fracture mechanics and finite element analysis with
experimental material properties. Lam
et al.
[9] developed
an analytical model which proposes a delamination criterion
between the molding compound and the packaging substrate.
Ferguson
et al.
[10] measured moisture effects on the in-
terfacial fracture toughness. To obtain information such as
delamination, crack initiation, and the corresponding variables
in a packaging structure, quantitative real-time, and
in situ
measurement methodologies for moisture-induced effects are
needed. To this end, Pecht
et al.
[11] examined the out-of-plane
deformation of 132-lead plastic quad-flat packages (PQFPs)
through an experimental setup using a probe. The swelling
deformation was obtained by comparing the probe movements
on the top and bottom surfaces at approximately the center
of the device. Lau
et al.
[12], [13] measured the deformation
time history of a plastic ball grid array (PBGA) packages on
printed circuit board (PCB) using resistive strain gages on the
top surface of the molding compound, and popcorn phenomena
were monitored before the peak temperature during the reflow
process. Unfortunately, both of the aforementioned works de-
rived information only at a single point on the package surface
and neither provided direct stress measurement.
Piezoresistive sensors have been used for stress measure-
ments within microelectronic packaging because they provide
in situ
, real-time, and nondestructive stress measurements
with relatively low cost [14]–[21]. In this paper, piezoresistive
sensors manufactured on test chip surfaces were employed as
I. I
NTRODUCTION
I
T IS well known that plastic materials absorb moisture in a
humid environment. As packaging technologies are contin-
uously moving toward higher performance, smaller scale, and
higher density, moisture-induced effects such as hygroscopic
swelling and the popcorn failure becomes increasingly impor-
tant for plastic and nonhermetic packages.
A handful of studies on moisture-related effects on mi-
croelectronic packages have been documented. Although the
hygroscopic swelling mechanism at the microscale level is still
not understood [1], different experiments have been developed
for measuring macroscopic swelling properties on packaging
materials. Wong
et al.
[2] used a thermal mechanical analyzer
(TMA) and thermal gravimetric analyzer (TGA) to measure
of the coefficient of hygroscopic swelling (CHS) on different
packaging materials. Fremont
et al.
[3] evaluated the moisture
diffusion behaviors of next generation resins for encapsula-
tion. Recently, Ardebili
et al.
[1] experimentally investigated
moisture-induced swelling characteristics on various molding
Manuscript received January 6, 2004; revised November 22, 2004. This work
was supported by the National Science Council (NSC) of the R.O.C. Govern-
ment under Project NSC 92-2218-E-014-005.
B.-J. Lwo is with the Department of Mechanical Engineering, Chung-Cheng
Institute of Technology, National Defense University, Ta-Shi, Tao-Yuan, 335,
Taiwan, R.O.C. (e-mail: lwob@ccit.edu.tw).
C.-S. Lin was with the Department of Weapon System Engineering, Chung-
Cheng Institute of Technology, National Defense University, Ta-Shi, Tao-Yuan,
335, Taiwan, R.O.C. He is now with the Kingmax Technology Inc., Chu-Pei,
Hsin-Chu, 302, Taiwan, R.O.C.
Digital Object Identifier 10.1109/TADVP.2007.898603
1521-3323/$25.00 © 2007 IEEE
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394
IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 3, AUGUST 2007
TABLE I
N
ORMALIZED
C
OORDINATES FOR
S
ENSOR
L
OCATIONS
Fig. 1.
Test chip layout.
the monitoring tools for moisture-induced stress measurements
in a nonhermetic, space-saving low profile, fine pitch, ball
grid array (LFBGA) package with 196 balls. The experimental
procedure was designed based on the IPC/JEDEC J-STD-020B
standard and procedures reported in the literature. The hygro-
scopic swelling stress and real-time stress monitoring during
popcorn failure were recorded. Moisture-induced effects such
as the moisture absorption/desorption ratio and postreflow
experiments were performed for verification purposes.
Fig. 2.
Five-element rosette cell.
II.
T
ESTING
S
AMPLE
P
REPARATION AND THE
T
HEORETICAL
M
ODEL
were designed for the studies unrelated to the current moisture
work.
Based on linear models of high concentration piezoresistors
[14], [15], [20], [21], as depicted in Fig. 2, the relationship be-
tween the fractional resistance variations for resistors
In this work, each 7 7 mm square test chip contains five
stress-sensing cells. Each stress-sensing cell has a heavily
implanted, five-element -type piezoresistive resistor rosette.
Fig. 1 shows the layout of the test chips with the associated
coordinate system. The stress sensing cells were fabricated on
the surface of (100) silicon wafers by Taiwan Semiconductor
Manufacturing Company, a commercial integrated circuit (IC)
foundry, using 0.6 complementary metal–oxide–semicon-
ductor (CMOS) design rules. Points A–E in Fig. 1 point out
the sensor locations on the chip surface. A poly-silicon heater
was fabricated at the chip center to simulate the heat generation
in a real chip during operations. Since the chips as well as the
packaging structures are mechanically symmetric, sensors B, C,
D were located on the diagonals of the test chip and sensors A
and E were located on the horizontal symmetry line of the test
chip along the [110] direction of the crystallographic direction.
Table I lists the normalized coordinates for the sensor locations
based on the assumption that the coordinate origin is located at
the chip center.
Fig. 2 shows the configuration of a rosette cell. The size of
each resistor is approximately 20 50 . The size of the en-
tire rosette cell is about 200 200 , and the orientations of
the resistors , , , , and with respect to the [110]
direction of the crystallographic directions (the axis) are 0 ,
90 ,45 , , and , respectively. The initial mea-
sured resistances of the resistors were approximately 30
to
and the stress and temperature can be written as
(1)
(2)
(3)
where , , and are the in-plane stresses and ( ,
2, and 3) are the initial resistances at the reference temperature,
which is approximately 25 . are the individual resis-
tance variations. is the temperature difference between the
measuring point and the reference. are the tempera-
ture coefficients of resistor ; and , , are the piezore-
sistive coefficients. Papers [19] and [20] have shown that type
piezoresistive sensors are suitable for measuring shear stress and
the difference in normal stress, but they are not recommended
for measuring individual normal stress. Therefore, we only em-
ploy
with
slightly variations from resistor to resistor. Resistors
and
type piezoresistive sensors in this study.
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LWO AND LIN: MEASUREMENT OF MOISTURE-INDUCED PACKAGING STRESS WITH PIEZORESISTIVE SENSORS
395
Fig. 3.
(a) Top view and (b) side view of the LFBGA packaging (unit: millimeters).
TABLE II
E
XTRACTED
C
OEFFICIENTS FOR
n
T
YPE
P
IEZORESISTIVE
S
ENSORS
Table II summarizes the calibrated temperature and piezore-
sistive coefficients and the corresponding standard deviations
for the type sensors used in this study. The relatively small
standard deviations in Table II suggest acceptable uniform
sensor behavior. Although out-of-plane stress components can
also be measured by piezoresistive sensors fabricated on the
(111) silicon plane [16]–[19], test chips in this study were
made on the (100) silicon plane for measuring in-plane stress
only. The (100) silicon surface was chosen because: 1) more
simple calibration, 2) hygroscopic effects produce small shear
as well as out-of-plane stress, and most importantly, 3) cost,
since commercial bipolar processes on the (111) plane are very
expensive.
After calibration, the test chips were assembled into 196-ball
LFBGA packages, which are employed in applications such as
cellular telephones and networking systems. The geometric di-
mensions of the 196-ball LFBGA are shown in Fig. 3. The pitch
and diameter of the solder balls are 1 and 0.5 mm, respectively.
Note that the test chip is 0.49 mm thick and the total thickness of
the testing samples, including the solder ball height, is 1.4 mm.
Consequently, the molding compound thickness above the test
chip surface is less than 0.3 mm.
Fig. 4.
Flow chart of the experimental procedure.
measured. The stresses due to the packaging process before
the experiments were obtained by measuring the changes in
resistance at each piezoresistive cell, and inverting (1)–(3) with
the calibrated coefficients listed in Table II [22]. The weights of
the LFBGA packages were recorded using a Sartorius P200D
electronic weight scale, so that the moisture absorbed in the
testing samples due to packaging/transportation/storage could
be obtained by comparing with the dry weights measured
subsequently.
The dry baking or desorption process was performed at
for 24 h to remove existing moisture that may have been
introduced. Stress as well as sample weights were recorded after
dry baking to obtain the differences due to the baking process.
Moisture preconditioning was performed at 85 and 85%
relative humidity (RH) for 168, 196, and 408 h, respectively.
A moisture preconditioning procedure at 90 and 100% RH
was also performed for 650 h to extract the saturated moisture
absorption ratio (to be explained in Section IV-A) and to mag-
nify the moisture-induced effects on the packaging structure to
increase the potential of popcorn occurrence. Sample weight
and internal stress were measured to characterize the moisture
preconditioning procedure.
After the aforementioned procedure, the test samples were
subjected to a rapid thermal excursion, which simulated the re-
flow temperature profile. The resistances of the piezoresistors
III. E
XPERIMENTAL
P
ROCEDURE
The experimental procedure used in this study was developed
based on the IPC/JEDEC J-STD-020B standard [6] and pop-
corn phenomenon related work in the literature, see Fig. 4. The
initial scanning acoustic microscope (SAM) inspection before
the dry baking revealed no preexisting delaminations in the
testing samples (not shown). Before being packaged, the test
chips under room temperature were assumed to be stress-free.
Under these conditions the initial sensor resistance
were
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396
IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 30, NO. 3, AUGUST 2007
Fig. 6. MAR at different precondition time. Samples were preconditioned
under 85
C
/85%RH except the asterisked one, which was preconditioned
under 90
C
/100%RH.
Fig. 5.
Experimental setup for the simulated reflow measurements.
and the temperature were recorded with respective to time. The
piezoresistive rosette measurements were then transformed to
stress. Fig. 5 shows the experimental setup for the reflow mea-
surements. The test samples were put into a socket in an oven.
Up to 18 channels could be simultaneously measured by the
HP 3421A data acquisition unit with a PC controller, and this
automatic system periodically measured the resistance of the
piezoresistive sensors. A highly accurate/sensitive Lakeshore
PT-102 platinum resistance thermometer (not shown in Fig. 5)
was placed on the socket and kept in contact with the molding
compound on the LFBGA surface. Since the molding compound
above the test chip is less than 0.3 mm thick, the temperature
readings on the rapid response thermometer were treated as the
chip temperatures. The experimental procedure was completed
after the postreflow experiments that included a second SAM in-
spection as well as the cross section delamination observations
through an optical microscope.
Fig. 7.
Average stress changes due to baking.
time (the soaking requirement in the IPC/JEDEC J-STD-020B
standard), it is reasonable to conclude that the saturated moisture
absorption level is not a necessary condition for the occurrence
of popcorn phenomena.
B. Stress Due to the Hygroscopic Effect
Due to relatively large thermal contractions of the polymer
encapsulation material and the substrate after the molding
process, compressive stresses on the silicon chip surfaces in
LFBGA structures were first observed at room temperature
before baking [23]. This observation matches the observations
in our previous work for PQFPs [21]. Comparing the extracted
resistance data before and after 24 h of baking, the average
stress changes at each sensor location at room temperature
were obtained and are plotted in Fig. 7. It is obvious from
Fig. 7 that negative or compressive stress changes on the chip
surfaces occur due to moisture desorptions. The average stress
changes in and for all sensor locations are calculated to
be 21.4 MPa and 20.3 MPa, respectively.
Similarly, stress changes at each sensor location due to the
saturated moisture preconditioning process (90 /100RH for
650 h) were measured and the averages are plotted in Fig. 8.
Fig. 8 indicates that positive or tensile stress changes occur
on the chip surfaces due to moisture absorption. The average
changes in and at room temperature are calculated to be
71.6 MPa and 68.6 MPa, respectively. Note that since the mag-
nitude of the mechanical stress depends on many factors, local
variation in chip stress at a single site was observed in the lit-
erature [18] and our previous study [23]. These variations con-
IV. R
ESULTS AND
D
ISCUSSIONS
A total of 30 samples were processed. Due to resistor failures
in some of the piezoresisitve cells, there are some samples with
rosettes that did not contribute to the stress averages.
A. Gravimetric Analyses
For moisture-induced gravimetric analyses, the moisture ab-
sorption or moisture desorption ratio (MAR or MDR) is defined
as
(4)
The average weight of the samples measured before baking
was 0.6087 g with a standard deviation of 0.0036 g. The average
MDR after baking was measured to be 0.24% with standard de-
viation of 0.03%. After different moisture preconditioning as
described in the previous section, the MARs with respect to the
preconditioning time is plotted in Fig. 6. A least squares poly-
nomial fit to the data is also shown in Fig. 6. From Fig. 6, it
can be concluded that the saturated moisture absorption ratio
for the LFBGA package is about 0.55% after 550 h of mois-
ture preconditioning. Since popcorn failures were observed in
the testing samples with 0.44% MAR and 168 h of precondition
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LWO AND LIN: MEASUREMENT OF MOISTURE-INDUCED PACKAGING STRESS WITH PIEZORESISTIVE SENSORS
397
Fig. 9.
Temperature-time profile for a typical testing sample.
Fig. 8.
Average stress changes due to the saturated moisture preconditioning.
tributed to the relatively large standard deviations observed in
Figs. 7 and 8.
It has been reported in literature [1], [2], and [4] that hygro-
scopic swelling is believed to be the main reason for the above
changes in compressive and tensile stress in the packaging struc-
ture. That is, the plastic molding compound and the BT substrate
contracted after baking and expanded after absorbing moisture,
while the silicon chip does not expand. These mismatches cre-
ated compressive and tensile change in the chip stresses, as
shown in Figs. 7 and 8, respectively.
Comparing the gravimetric analysis results in the previous
subsection ( 0.24% of MDR versus 0.55% of saturated MAR,
which is about 2.3 times difference in magnitude) with the stress
change magnitude in this subsection ( 21.4 MPa versus 71.6
MPa for ; and 20.3 MPa versus 68.6 MPa for , which are
approximately 3.3 times differences), the results seem to suggest
that the hygroscopic effect on stress is more influential than the
gravimetric effect.
Based on our previous study on the same batch of LFBGA
samples [23], the chip stress induced by uniform temperature
change is approximately 0.51 , and about 39 MPa of
normal stress is observed on the chip surface after one watt of
chip power is used to heat the chip center. Comparing this pre-
vious thermal stress data with the results in this subsection, it
is estimated that the stress created by moisture absorption in a
package during manufacturing/transportation/storage (approxi-
mately 21 MPa) is equivalent to the stress induced by 40
temperature rise or 0.55 W heating in the packaging during op-
eration. The total hygroscopic stress effect on a moisture-satu-
rated packaging relative to a “dry” package (more than 65 MPa)
is equivalent to more than 120 of temperature change or more
than 1.6 W of input power. Therefore, it is reasonable to con-
clude that stresses due to moisture changes in plastic packaging
are similar to those induced by large temperature changes, and
should not be ignored.
Fig. 10.
R-T relationships for a typical testing sample.
occurrence of more popcorn failure. Since the molding com-
pound above the chip surface is very thin and a highly sensitive
thermometer was kept in contact with the packaging surface
during measurements, the thermometer temperature readings
were treated as the piezoresistive sensor temperature.
Fig. 10 shows a typical resistance versus temperature (ori-
ented at a specific direction) relationships (i.e., the R-T plots)
for a “popcorned” testing sample. The resistance versus tem-
perature relationship shown in Fig. 10 basically follows a linear
temperature-resistance profile due to the constant temperature
coefficients in (1)–(3), which are relatively larger than the
piezoresistive coefficients . However, jumps or discontinu-
ities that appeared simultaneously at sensors with different ori-
entations and at many chip locations indicate the occurrence of
popcorns or delaminations. Although the occurrence of popcorn
phenomena based on signal discontinuities were also observed
by Pecht
et al.
[11] and Lau
et al.
[12], [13], piezoresistors were
first employed as a popcorn failure monitoring tool in this work
because of the advantages described in Section I.
It was also observed that popcorn failures took place not only
before the peak reflow temperatures were reached, but also
below the melting temperature of the eutectic solder ( ).
This is the same conclusion as described in the literature [12],
[13].
Fifteen of the thirty testing samples exhibited popcorn phe-
nomena during the reflow experiments. For the popcorned sam-
ples, resistance discontinuities that occurred before 183 were
observed on 11 samples. Stress verses temperature plots (i.e.,
the S-T plots) were obtained by converting resistance measure-
ments into stress values. As expected, stress discontinuities were
C. Real-Time Monitoring During the Reflow Process
A typical temperature-time profile for the reflow process
studies is plotted in Fig. 9. The ramp-up period approximately
follows the IPC/JEDEC standard [6], but the preheat stage was
skipped in order to increase the potential of popcorn occurrence.
Instead of performing a temperature ramp down immediately
after reaching the peak temperature as stated in the standard,
the high temperature extreme was maintained to induce the
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